Deliverables: complete examples

Sample std library layout (Add-only minimal tree; name="std" per FMF v0.1 specification, C.1.1). Files live under docs/specifications/examples/std/ for tooling and tests. Icons match Studio BasicOperator styling; ``add_16.svg`` is the preferred single-resolution asset (see FMF v0.1 specification, C.3.1). Regenerate with python scripts/generate_operator_library_svgs.py in synarius-core.

Sample library folder structure

std/
  libraryDescription.xml
  components/
    Add/
      elementDescription.xml
      behavior/
        add.fmfl
      resources/
        icons/
          add_16.svg
          add_32.svg
          add_64.svg

Full sample ``libraryDescription.xml``

<?xml version="1.0" encoding="UTF-8"?>
<LibraryDescription fmfVersion="0.1" name="std" version="1.0.0">
  <Description>Primitive arithmetic elements for Synarius (FMF v0.1 sample).</Description>
  <Vendor>Synarius</Vendor>
  <elements>
    <Element id="Add" path="components/Add/elementDescription.xml"/>
  </elements>
  <Capabilities>
    <Capability id="pure_function"/>
  </Capabilities>
  <ExecutionProfiles>
    <Hint id="hosted_python"/>
  </ExecutionProfiles>
  <RuntimeContributions/>
</LibraryDescription>

Full sample ``elementDescription.xml`` for Add

<?xml version="1.0" encoding="UTF-8"?>
<ElementDescription id="Add" name="Add">
  <Description>Binary real addition.</Description>
  <Ports>
    <Port kind="in" name="in0" type="real"/>
    <Port kind="in" name="in1" type="real"/>
    <Port kind="out" name="out" type="real"/>
  </Ports>
  <Parameters/>
  <Behavior>
    <FMFL file="behavior/add.fmfl"/>
  </Behavior>
  <Graphics icon16="resources/icons/add_16.svg"
            icon32="resources/icons/add_32.svg"
            icon64="resources/icons/add_64.svg"/>
</ElementDescription>

Full sample FMFL for Add

fmfl 0.1

init:
    pass

equations:
    out = in0 + in1